Research and Advances

Asymmetric memory hierarchies

A study is presented of some of the system implications of memory hierarchies in which the backing or secondary store has a very small read time, relative to both the time required for writing and to the read time of conventional backing storage devices. Several analytic models are introduced, and it is shown that such hierarchies may operate in ways which differ from those of more conventional hierarchies. In particular, it is shown that it may not be necessary to multiprogram in such a situation. In the past, backing storage devices have been roughly symmetric with respect to their read and write times. This situation may not continue, as several devices are currently under development which may have a very small read-time/write-time ratio. This study places particular emphasis on one such system—the RCA read/write holographic optical memory.

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Research and Advances

Storage utilization in a memory hierarchy when storage assignment is performed by a hashing algorithm

The utilization of storage is studied in a two-level memory hierarchy. The first storage level, which is the fast store, is divided into a number of storage areas. When an entry is to be filed in the hierarchy, a hashing algorithm will attempt to place the entry into one of these areas. If this particular area is full, then the entry will be placed into the slower second-level store, even though other areas in the first-level store may have space available. Given that N entries have been filed in the entire hierarchy, an expression is derived for the expected number of entries filed in the first-level store. This expression gives a measure of how effectively the first-level store is being used. By means of examples, storage utilization is then studied as a function of the hashing algorithm, the number of storage areas into which the first-level store is divided and the total size of the first-level store.

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