IBM researchers have demonstrated a patterning technique capable of creating structures as small as 15 nanometers, and say the technology is a simpler and less expensive way to make nanostructures in semiconductors and other components. The demonstration consisted of two three-dimensional patterns created using the technology—a 1:5 billion scale replica of Switzerland's Matterhorn mountain that is less than 25 nanometers tall and a relief map of the world measuring 22 micrometers by 11 micrometers.
The patterning technique uses a silicon needle measuring 100 nanometers across at the base and tapering to a width of a few nanometers at the tip. Through a combination of heat and force, the needle is used to remove substrate material based on a predefined pattern.
The technology has the potential to go even smaller, according to IBM, and produces structures at a cost 80 percent to 90 percent lower than the cost of using electron-beam lithography.
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