Stanford University researchers have developed the first three-dimensional (3D) carbon nanotube circuits. Three-dimensional nanotube circuits could be a major step toward making nanotube computers, which could be faster and use less power than silicon chips. Stanford's research demonstrates that it is possible to make stacked circuits using carbon nanotubes. Stacked circuits contain more processing power in a defined space, and do a better job of dissipating heat. The Stanford circuit designs allow for the creation of more complex nanotube circuits despite the material's limitations.
When arrays of nanotubes are grown to make circuits, there is a mix of semiconducting nanotubes and metallic nanotubes, which will cause electrical shorts if they are not eliminated. Previous efforts have focused on creating methods for growing straight, pure nanotubes, but the Stanford researchers instead focused on mitigating any defects to make sure the system still works.
The researchers use what Stanford professor Subhasish Mitra calls a "dumb" layout. A stamp is used to transfer a flat-lying, aligned array of carbon nanotubes grown on a quartz substrate to a silicon wafer. Those nanotubes are then topped with metal electrodes and an insulating layer is inserted between the nanotubes and the wafer's surface to act as a back gate. A top gate is then added so that it will not connect with any misaligned tubes. Circuits are then etched to remove metal electrodes that are not needed for the final circuit design. The stamping and electrode-growth procedures are repeated to stack as many layers as needed before the final etching process for a 3D circuit.
From Technology Review
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