Chipmaker Intel has disclosed more information about the Universal Chiplet Interconnect Express (UCIe) standard, through which it intends to package x86-, Arm-, and RISC-V-based computing cores onto a single chip.
Intel and nine other companies established the standard in March as a high-bandwith, low-latency connector.
Intel's Bob Brennan said UCIe's first iteration will run at approximately 12 gigabits per second per pin, while another will support about 16 gigabits per second—far outpacing PCI Express (PCIe).
Brennan said UCIe is engineered for short distances at the chip level, while PCIe is deployed at the motherboard level, for transferring data farther using different electrical requirements.
He described the core package as a "chiplet chassis," with computing blocks linked through UCIe channels.
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