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Demonstration of High-Speed SOT-MRAM Memory Cell Compatible with 300-mm Si CMOS Technology


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A schematic diagram of the STT-MRAM cell.

Researchers at Tohoku University in Japan have developed a high-speed spin-orbit-torque magnetoresistive random-access memory cell that interoperates with silicon complementary metal oxide semiconductor technology.

Credit: CIES/Tohoku University

Researchers at Tohoku University in Japan have demonstrated a high-speed spin-orbit-torque (SOT) magnetoresistive random-access memory (MRAM) cell that interoperates with silicon (Si) complementary metal oxide semiconductor (CMOS) technology.

This development is essential for MRAM's replacement of static random-access memory.

The integration process applies to SOT devices compatible with 55-nanometer CMOS technology and manufactured SOT devices on 300-millimeter CMOS substrate.

The SOT device realizes high-speed switching down to 0.35 nanoseconds and a sufficiently high thermal stability factor for high-speed non-volatile memory applications, with tolerance against annealing at 400 degrees Celsius.

These accomplishments met the challenges for making SOT-MRAM practical for commercial use, and will play a role in enabling high-performance electronics that use low power.

From Tohoku University (Japan)
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Abstracts Copyright © 2019 SmithBucklin, Washington, DC, USA


 

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