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Five Times the Computing Power


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Components on a circuit board.

Linkoping University researchers have developed a way to boost the computing power of a standard algorithm five-fold when performed on a field-programmable gate array.

Credit: Andy Lim

Researchers at Linkoping University in Sweden have developed a method to increase by a factor of five the computing power of a standard algorithm when performed on a field-programmable gate array (FPGA).

The FPGA consists of a matrix of logical gates that can be programmed in situ, and can be reprogrammed an unlimited number of times.

"This advance will save huge sums for demanding calculations in industry, and will make it possible to implement new functionality without needing to replace the hardware," says Linkoping University's Oscar Gustafsson.

Typically, an algorithm is selected that can carry out the desired calculations, and then the architecture is developed using the required blocks, which is then transferred to the FGPA. The Linkoping researchers changed the signal routes, which delivers to the chip a capacity that is five times greater for each hardware unit.

From Linkoping University
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Abstracts Copyright © 2017 Information Inc., Bethesda, Maryland, USA


 

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