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Scientist Developing 3D Chips to Expand Capacity of Microprocessors


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Artist's conception of 3D chips.

Researchers at Stony Brook University are working to develop three-dimensional integration to vertically stack multiple wafers, significantly enhancing the capabilities of current two-dimensional chips.

Credit: David Carron/Wikimedia Commons

Stony Brook University researchers say they are developing new technology, circuits, and algorithms for the next generation of microprocessors, mobile computing devices, and communication chips. They hope to overcome the fundamental limitations of current electronic systems, such as high power consumption, says professor Emre Salman.

The researchers are working to develop three-dimensional (3D) integration, an emerging technology that would vertically stack multiple wafers, which could significantly enhance the capability of the current two-dimensional chips. In 3D integration technology, discrete chips or tiers are stacked on top of each other before they are packaged. A single 3D chip would be able to detect data from the environment, process and store the data using advanced algorithms, and wirelessly transmit the data to a remote center. The researchers say they are focusing on an approach with the potential to enlarge the 3D domain from high-performance computing to relatively low-power systems-on-chip, which integrate multiple functions into a single 3D chip.

"Our fundamental objective is to develop a reliable 3D analysis and design platform for these applications which will host future electronics systems that are increasingly more portable, can interact with the environment, consume low power, yet still offer significant computing capability," Salman says.

From National Science Foundation
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