Researchers at Purdue and Harvard universities have developed a transistor that consists of three nanowires made out of indium-gallium-arsenide. The three nanowires are progressively smaller, resulting in a tapered cross section that resembles a Christmas tree. The researchers say the transistors could enable engineers to build faster and more efficient and compact integrated circuits that generate less heat than existing devices.
New research has shown that a device's performance can be improved by linking the transistors vertically in parallel. "Stacking them results in more current and much faster operation for high-speed computing," says Purdue professor Peter Ye. "This adds a whole new dimension, so I call them 4D."
Ye says silicon-based transistors have shrunk to about 22 nanometers, but size reductions beyond 10 nanometers and additional performance improvements are likely not possible using silicon. He notes creating smaller transistors also will require finding a new type of dielectric layer that allows the gate to switch on and off. Ye says the new transistors are coated with a composite dielectric that enables the researchers to create transistors made of indium-gallium-arsenide with 20-nanometer gates.
From Purdue University
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