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Novel Coding Technique Patented By A*star Researchers


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Memory chips

Enhanced memory chips could help eliminate the need to boot up computers.

Credit: iStockphoto.com/crstrbrt

A*STAR Data Storage Institute researchers have developed an algorithm for correcting errors that occur when information is stored and read out incorrectly.

The algorithm significantly enhances the error tolerance of spin-torque transfer magnetic random access memory (STT-MRAM), which is a key contender for the future of non-volatile memories. "This is a breakthrough work that will help provide bigger tolerances and ease the engineering challenges in STT-MRAM material and process development," says Pantelis Alexopoulos, Executive Director of the Data Storage Institute.

The researchers also developed a new design of the memory sensing and detection architecture that is based on soft decision decoding. They say the technique leads to significantly fewer decoding errors than hard decision decoding.

The design also features a soft-output channel detector, which measures the probabilities of the bits read out being set as 0 or 1, and feeds the information into the soft decision decoding process. The researchers have shown that the new design achieves a 20 percent increase in the tolerance towards variations in the electrical resistance of devices.

From A*STAR Research
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Abstracts Copyright © 2012 Information Inc. External Link, Bethesda, Maryland, USA 


 

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